Hardware-efficient quantum error correction

The qubit that
corrects itself.

Heisenberg Research builds cat-qubit processors that suppress errors in the hardware itself, collapsing the overhead of fault tolerance from a thousand physical qubits per logical qubit to a few dozen.

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~15:1physical → logical
10⁵×bit-flip suppression
10 mKoperating regime
The overhead problem

Today’s qubits
fail too often.

A useful quantum algorithm needs logical error rates near one-in-a-trillion. Real qubits are off by nine orders of magnitude. The industry’s answer, error correction, works, but the standard recipe is brutally expensive in hardware.

Best physical error rate0per opState-of-the-art superconducting qubits drop a bit roughly every thousand operations. Algorithms need far better.
Required logical rate0per opTo factor, simulate chemistry, or break a cryptosystem, errors must be vanishingly rare across billions of operations.
Surface-code overhead0qubits eachBridging that gap with a 2D surface code costs ~1,457 noisy physical qubits for every error-corrected logical one.

A machine that runs real workloads would need millions of physical qubits. Cooling, wiring and controlling them is the wall the whole field is staring at. We go around it.

How cat qubits work

Don’t fix every error.
Make most of them
impossible.

01 / Two errors

Every qubit fails two ways

A qubit can suffer a bit-flip (0 becomes 1) or a phase-flip. Standard codes spend enormous resources correcting both at once on a 2D lattice.

02 / Schrödinger’s qubit

Encode in a cat state

We store information in two opposite-phase coherent states of a superconducting microwave cavity — |α⟩ and |−α⟩, a quantum superposition of “alive” and “dead.” A true Schrödinger cat.

03 / Noise bias

Bit-flips become exponentially rare

Autonomous two-photon stabilization pins the cavity to those two states. As we add photons, the energy barrier between them grows and bit-flips are suppressed exponentially — by factors of 100,000 and beyond.

04 / One error left

Correct phase-flips with a 1D code

With one error type effectively gone, a simple repetition code along a single line cleans up the rest — replacing the heavy 2D surface code and shrinking the hardware bill by orders of magnitude.

|0⟩ · |1⟩ — two failure modes
The processor

Meet CAT-C1.

Our first-generation cat-qubit processor. Each logical qubit is built from a small chain of dissipatively-stabilized cat cells — fabricated in superconducting tantalum on silicon and operated deep in a dilution refrigerator.

CAT-C1 · die view
Qubit typeDissipative cat qubit
EncodingCoherent states |±α⟩
Mean photon numbern̄ ≈ 8photons
Bit-flip lifetime> 10seconds (target)
Physical → logical~15 : 1
Error-correcting code1D repetition
SubstrateTa / Nb on silicon
Operating temperature~10millikelvin

↳ Target architecture specifications. Figures describe the CAT-C1 design point, not guaranteed measured performance.

Where we’re going

From one good qubit
to a useful machine.

2026

Founded

Heisenberg Research spins out to build hardware-efficient, cat-qubit-based fault tolerance.

Done
2026

First physical cat qubit

Stabilizing a single dissipative cat cell and demonstrating bit-flip suppression on hardware.

In progress
2027

First logical qubit

A repetition-code logical qubit built from cat cells, showing error suppression as the code grows.

Planned
2027

Below threshold

CAT-C1 multi-cell module crosses the fault-tolerance threshold and runs error-corrected logic.

Planned
2028

Logical processor

A networked array of logical qubits executes a universal, fault-tolerant gate set.

Planned
2028+

Utility scale

Hundreds of logical qubits tackle chemistry, optimization and cryptanalysis beyond classical reach.

Planned
Let’s talk

Build the
stable future.

Whether you’re an investor, a research partner, or an engineer who can’t stop thinking about fault tolerance, we want to hear from you.

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